1. Field of the Invention
This invention relates generally to the field of integrated microelectronics devices and, more specifically, to the formation of horizontal surrounding gate MOSFETs, devices having gate electrodes that surround a horizontal channel structure.
2. Description of the Related Art
The gate electrode of the typical metal-oxide-silicon field effect transistor (MOSFET) is formed on the planar surface of a dielectric layer over a doped channel within the mono-crystalline semiconductor substrate beneath the dielectric layer. Well known in the prior art, such a planar MOSFET is shown schematically in FIG. 1 and will be discussed below. The requirements of microelectronics integrated circuitry make other MOSFET geometries advantageous. McDavid et al. (U.S. Pat. No. 5,192,704) teach a method of forming a MOSFET having a vertical cylindrical channel with a gate electrode that surrounds the channel circumferentially. Such a vertical surrounding gate MOSFET, which McDavid et al. term a xe2x80x9cfilament channel transistor,xe2x80x9d allows vertical stacking of transistors and storage capacitors to form densely packaged DRAM circuits. Cho (U.S. Pat. No. 6,204,115 B1) also teaches the formation of a vertical channel MOSFET, called by Cho a xe2x80x9cpillar transistorxe2x80x9d disposed above a storage capacitor in a DRAM circuit. Clark (U.S. Pat. No. 5,162,250) also teaches the formation of a vertical filament or xe2x80x9cpillarxe2x80x9d transistor in conjunction with densely packed DRAM elements. FIG. 2, which will be discussed below, is a simplified schematic drawing of a vertical channel pillar or filament type MOSFET transistor. As is discussed in the prior art cited above, the formation of such vertical channel transistors presents difficulties as a result of the fact that the channel must be formed outside of the mono-crystalline semiconductor substrate, usually of amorphous or polycrystalline material. This not only presents problems with current leakage in polycrystalline material, but also with the formation of interconnections between the transistor and devices formed within the substrate. However, the surrounding gate electrode has the advantageous property that it can induce a complete inversion of the channel material.
The prior art does not teach the formation of a horizontal surrounding gate MOSFET, which is a geometrical formation in which the gate circumferentially surrounds a cylindrical channel but the channel is horizontally disposed between a source and a drain region. Such a MOSFET structure retains the benefits of a surrounding gate electrode, but lacks the difficult fabrication process associated with vertical channel structures.
The object of this invention is to provide a method for forming a horizontal surrounding gate MOSFET.
In accord with this object, a horizontal cylindrical channel is formed between a source and drain region disposed on a dielectric (typically an oxide) covered substrate. The formation preferentially begins with a silicon-on-insulator (SOI) wafer and the channel, source and drain region are formed monolithically from an upper silicon layer of the SOI wafer. An isotropic etch of the oxide allows the channel to be suspended above the oxide surface while remaining connected to the source and drain. A gate dielectric is then formed over the surface of the cylindrical channel and a gate electrode is then formed circumferentially over the gate dielectric.